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JESD51-8 集成电路热测试方法环境条件-Junction-to-Board
标准号 JESD51-8     登录可关注该标准
中文名称 集成电路热测试方法环境条件-Junction-to-Board
英文名称 Integrated Circuit Thermal Test Method Environmental Conditions - Junction-to-Board
发布日期 1999-10-12
工作组 JC-15.01
专业类型 固态技术
摘要 This specification should be used in conjunction with the overview document JESD51, "Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Device)" [1] and the electrical test procedures described in EIA/JESD51-1, "Integrated Circuit Thermal Measurement Method (Single Semiconductor Device)" [2]. The environmental conditions described in this document are specifically designed for testing of integrated circuit devices that are mounted on standard test boards with two internal copper planes [3]. This standard is not applicable to packages that have asymmetric heat flow paths to the printed circuit board caused by such thermal enhancements as fused leads (leads connected to the die pad) or power style packages with the exposed heat slug on one side of the package. 本标准中的术语


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